ANDOR DESIGN CORP
MIL-STD-1553 A, B
CIC201B VME/VXI B Size Interface
CIC201C VME/VXI C Size Interface
* SUPPORTS VALIDATION/PRODUCTION TEST PLANS.
* SIMULTANEOUS BC, MULTIPLE RTS, MONITOR.
* FULL ERROR DETECTION AND GENERATION.
* ON BOARD MAJOR/MINOR FRAME TIMING.
* PROGRAMMABLE MESSAGE PARAMETERS.
* PROGRAMMABLE OUTPUT AMPLITUDE.
* SOFTWARE WITH SOURCE CODE INCLUDED.
* 128K x 16 DUAL PORT STATIC RAM.
Data Transfer: D16/D8(EO) slave
Interrupts: 7 levels
CIC201B VME/VXI B Size
CIC201C VME/VXI C Size Shielded
The CIC201 is a full-featured, high performance, Dual Redundant MIL-STD-1553A/B serial bus Simulator Analyzer Tester designed as a plug in card for a VME/VXI backplane. The CIC201 includes full error injection and can operate in independent or simultaneous mode as a Bus Controller, multiple simulated Remote Terminals and full/selective Monitor. Its data structure can be changed on the fly without interrupting the processor for real time operation. The active monitor stores, time tag and annotates bus traffic with the message type and any detected errors. Stored words are annotated with a break down of the word error.
The CIC201 can be used for Validation Testing, Production Testing, full bus simulation and monitoring, as a general purpose 1553 interface or a stand alone bus Analyzer. For precise message scheduling and measurements, the Major and minor frame times are independent of message sequences or retransmissions on errors and the start of all command messages are independent of message length, response time or length of response. Message timing is calibrated and RT responses have low jitter.
G E N E R A L
S P E C I F I C A T I O N S
Major Frame Count
Major Frame Size
Minor Frame Time
Minor Frame Size
Reply Time jitter
Internal time tag
128K x 16
1 to 32768, Continuous
1 to 1024 Minor Frames
0 to 419 msec
0 to 32766 Commands
0 to 2048
2 to 6400 usec. in .1 usec. steps
2 to 33 usec. in .5 usec. steps 2 to 33 usec. in .5 usec. steps
Same or alternate bus
16 bits, 6.4 or 64 usec. steps
The CIC201 data filter looks at the complete command rather than just addresses and sub addresses. Individual Messages are designated to be ignored, monitored, replied to or monitored and replied to.
‑ Low bit count (1, 2)
‑ High bit count (1, 2, 3)
‑ Parity error
‑ Manchester low
‑ Manchester high
‑ Inverted Sync
‑ Zero crossing deviation (+/- 150 nsec, External)
- Response/Late response
‑ Non contiguous data (2 microsec.)
‑ Word count error
‑ Data on two channels
- Status word
- Invalid Word
M A X I M U M
R A T I N G S
+5 Volts +/‑ 5%
+12 Volts +/‑ 5%
-12 volts +/‑ 5%
CIC201B - VME B Size
CIC201C - VXI C Size
0 to +70 Deg. C
‑65 to +150 Deg. C
0.7 Amps Max
0.160 Amps 50% duty cycle
0.005 Amps Max
6.299 x 9.187 inches
13.50 x 9.187 inches
The CIC201 comes with an extended set of software on a floppy disc. This software package, with source code written in "C", includes drivers, software libraries and assorted utilities.
I/O channel address
The CIC201 processes 1553 messages with a minimum attention from the CPU. The user need only write a set of command Blocks, a message list and number of messages to define a minor frame of 1553 messages. He writes a minor frame time, the number of minor frames per major frame and a minor frame list to define a major frame. The bus controller sends the major frame a number of times as programmed in the major frame count, without any further attention from the CPU.
In the Remote Terminal mode, the user writes a set of command Blocks, a look-up table for the CIC201 to respond autonomously to incoming messages. In both modes an active monitor analyzes, annotates and stores bus traffic in a monitor Buffer.
- Direct coupling
- Transformer stub coupling
The CIC201 will normally return a DTACK to the CPU in 100 nanoseconds after receipt of a Data Strobe. This time is extendible to 900 nanoseconds if the CIC201 is transferring a Data Word to the 1553 circuitry. The CIC201 will start transmitting on the 1553 Bus 12 microseconds after receiving a start command.
The CIC201 is designed to operate as a memory based slave device on the computer back plane. It can transfer data on either a16 bit, 8 bit odd or 8 bit even path.
A Dual ported static RAM serves as the intermediate of data exchange with the 1553, while two registers control the mode of operation. Three additional registers are used to comply with the VXI requirement. Both the registers and the RAM can be loaded with new data while a message is being transmitted over the 1553 channel for real time applications.
Programming the CIC201 consists of transferring data to or from the RAM.
The CIC201 generates ten interrupt flags to indicate completion of a frame in the BC mode, receipt of a specified message, receipt of a specified Data word, receipt of a specified Status word, detected message errors or triggers.
For specialized features or unique interface requirements, please contact the factory.
Specifications subject to change without notice.
Copyright (c) 1995 - 2007 by Andor Design Corp. All rights reserved.
ANDOR DESIGN CORP. www.AndorDesign.com
20 Pond View Drive Telephone 516 364 1619
Syosset, New York, USA 11791-4409 FAX 516 364 5428
June 1, 1999